Staff Digital Design Engineer
Northrop Grumman - Linthicum, MD
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Requisition ID: R10183633 Category: Engineering Location: Linthicum, Maryland, United States of America Clearance Type: Top Secret Telecommute: No- Teleworking not available for this position Shift: 1st Shift (United States of America) Travel Required: No Relocation Assistance: Relocation assistance may be available Positions Available: 1 At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work "” and we have an insatiable drive to do what others think is impossible. EDA is seeking a Staff Digital Design Engineer responsible for the research, design, and development of digital hardware products. Expertise in digital component design and analysis, modeling and simulation, circuit level design, verification and test, and project leadership are desired for this position. Work with engineers in other disciplines to develop these circuits into final products. Handle complex technical issues and resolve them in new and innovative ways. Work will be performed under consultative direction toward predetermined long-range goals and objectives. Candidates should have the ability to work on unusually complex technical problems and provide solutions which are highly innovative and ingenious. This role will support Payload and Ground Systems Division, Remote Sensing Program (RSP) Business Unit out of Linthicum, MD . Basic Qualifications: Bachelor's degree in electrical engineering, or STEM related discipline with a minimum 12 years of digital electronics design experience or 10 years of digital electronics design experience with a Master's degree in a technical field, or 7 years with a Ph.D. Digital circuit card design experience including schematic capture, layout, simulations/analysis as well as test and integration for interfaces such as Spacewire, Ethernet, RS-422, LVDS interfaces, ASICs, FPGAs, etc. Prior hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or embedded processors, and/or high-speed interfaces. Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications. Proven skills to include team leadership, mentoring others, communicating with all levels of an organization internally and externally, being adaptable, creative, collaborative, and comfortable working independently and enjoys solving difficult problems. Signal integrity/Power integrity analysis via Hyperlynx US Citizenship required Circuit card design experience utilizing Siemen's Xpedition No clearance required to start, but must be able to obtain and maintain a Top-Secret Clearance Preferred Qualifications: 20 yrs of relevant experience Proficient in SIPI using Keysight ADS Top Secret Clearance Worst Case Circuit Analysis Mixed Signals Design experience Salary Range: $179,600 - $269,400The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions. Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit. #J-18808-Ljbffr
Created: 2025-02-01