Signal Integrity Engineer

Signal Integrity EngineerLocation: San Jose, CAJoin a cutting-edge technology company specializing in the advancements in high-performance computing, data centers, and next-generation networking. You will play a pivotal role in designing and optimizing advanced interconnect technologies, focusing on high-speed parallel interfaces, including 2.5D and 3D architectures. This dynamic position combines R&D responsibilities with customer-facing engagements to deliver industry-leading solutions.Key Responsibilities:Development & AnalysisPerform timing signoff for advanced parallel interfaces, leveraging time-domain simulations (e.g., SPICE).Conduct electromagnetic extraction and modeling for signal and power delivery networks, including PCBs, packages, and interposers.Analyze AC and transient behavior of power distribution networks (PDN).Develop pre-layout models for transceivers, signal paths, and PDN networks.Execute IO channel analysis to ensure optimal performance of high-speed designs.Process Optimization & AutomationAutomate critical signoff processes using scripting languages such as TCL and Python.Collaborate with EDA tool providers to enhance accuracy and streamline workflows.Documentation & SupportPrepare detailed analysis reports, signoff documentation, and technical presentations for internal and customer stakeholders.Engage in pre-sales technical discussions to support customer design requirements and solutions.Collaborative DevelopmentPartner with cross-functional teams, including R&D, IP development, and manufacturing, to innovate and deploy next-generation interconnect technologies.Contribute to the development of MCM, 2.5D, and 3D interconnect IP and solutions. Required Qualifications:Education & ExperienceBSMS in Electrical Engineering, Computer Engineering, or a related field.8+ years of experience in signal integrity (SI) engineering, focusing on IC, package, and PCB design.Technical ExpertiseProficient in analyzing IC, package, and PCB databases.Strong scripting skills in TCL and Python for process automation.Familiarity with at least one DDR timing signoff flow tool suite.Expertise in electromagnetic modeling and extraction tools for SI and PDN analysis.Soft SkillsSelf-driven and able to work independently across global teams and customer bases.Strong multitasking abilities to manage multiple projects under tight deadlines.Excellent communication skills to effectively present technical concepts to diverse audiences.Adaptability to integrate innovative tools and methodologies into existing workflows.Preferred QualificationsExperience in 2.5D and 3D interconnect technologies.Knowledge of developing interconnect IP for multi-chip modules (MCM), package, and interposer designs.Proven ability to address customer-specific challenges with tailored solutions.This role offers a unique opportunity to drive innovation in high-speed interconnect technologies and collaborate with industry-leading experts. If you thrive in a fast-paced, technology-driven environment, apply today to become part of a forward-thinking team.

Created: 2025-02-21