ASIC RTL/SoC Design Engineer
PER International - naples, FL
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We are partnering with a high-growth startup at the forefront of semiconductor innovation. This company is redefining edge AI computing with cutting-edge technology and a highly talented team. Backed by strong funding and industry-leading expertise, they offer an exciting opportunity for engineers to work on next-generation SoC designs. With a culture of innovation, collaboration, and technical excellence, this is the perfect environment for engineers looking to make a significant impact in a fast-moving industry.We are seeking a highly skilled and motivated ASIC RTLSoC Design Engineer to join our team. This role involves leading RTL design, simulation, and verification efforts for innovative SoC products. The ideal candidate will have a strong background in RTL design methodologies, IP integration, and cross-functional collaboration to ensure seamless product development and delivery.Qualifications & Requirements:• Lead RTL design, simulation, and verification efforts for ASICSoC products, ensuring robust and efficient designs.• Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility.• Conduct Power, Performance, and Area (PPA) analysis to optimize design trade-offs based on internal and external requirements.• MS with 5+ years of experience or PhD in Electrical Engineering with emphasis on RTLSoCDigital Design.• Experience with Verilog and SystemVerilog.• Experience with VCS, Verdi, or other industry-standard tools.• Experience with pre-layout and post-layout simulation.• Understanding of the design flow and ability to work with the backend team.• Familiarity with AMBA APBAXI protocols.• Familiarity with RISCArm or other core architectures.• Ability to create innovative architecture and solutions based on customer requirements.• Ability to work in a startup environment and work both independently and as a team player, with the ability to provide technical leadership to other members of the engineering team.Preferred Experience:• FPGAASIC design of image processing systems.• Working knowledge of SoC architecture such as CPU, GPU, or accelerators.• Familiarity with UVM, place-and-route, STA, EMIRTERESTED?We are committed to submitting suitable candidates for this vacancy to our client ASAP, for more information contact Renz Moreno at PER Recruitment or send your CV to
Created: 2025-02-21