Mirafra Technologies | Senior HAPS Validation Engineer

FPGA Engineer position is your opportunity to join one of the industry's leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. You should have prior knowledge about FPGAs and computer architecture. As the FPGA Engineer for the team, you will have the opportunity to work in design verification, debug and system integration. You will work closely with the Architecture, Verification, ASIC Design and Software teams, and report into the Engineering organization.KEY RESPONSIBILITIESHelp set up FPGAEmulation platform (Synopsys HAPS) and device modelingHelp set up FPGAEmulation debugging toolsHelp modify the SoC design for the FPGA platform;Duties include modeling, debugging, verification and SW supportWork with SoC design engineers, verification team, systems team and software engineering to perform early prototyping, debug issues and identify fixes; andSupport test program development, chip validation, and chip life until production maturity.QualificationsKnowledge of RTL logic design (Verilog), strong experience working with FPGAs. Familiarity with PCIe, USB, Ethernet, ARM, and other commonly used blocks in SoC designs;Strong experience working with FPGA tools like VivaldoFamilarity with Synopsys HAPS FPGA systemGood communication skills.BS or MS (preferred) degree in EEEECSCS or equivalent.5 plus years of working experience

Created: 2025-01-19