NoC Interconnect Architect
PER International - san diego, CA
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THE CLIENTAs a top fabless semiconductor company, they power over 2 billion devices yearly, from mobile phones and home systems to automotive and IoT. Their energy-efficient SoCs are in 20% of households and nearly 1 in 3 mobile phones worldwide.With 25+ years of innovation, they specialize in mobile tech and multimedia products like smartphones, Chromebooks, smart TVs, and Voice Assistant Devices, partnering with global brands to make smart technology accessible to all.RESPONSIBILITIESCollaborate with the system architect to develop scalable and competitive interconnect architectures.Lead the design and optimization of NoC Interconnect and Memory System architectures to enhance power efficiency, performance, and implementation.Demonstrate a comprehensive understanding of system-level performance trade-offs, architecture, memory subsystems, and various memory technologies (e.g., DDR3, DDR4, DDR5, LPDDR3, LPDDR4, LPDDR5).Design and implement NoC Interconnect solutions for automotive applications, ensuring functionality, refining designs, and achieving performance targets and system requirements.Ensure all designs comply with automotive industry standards, such as ISO 26262 and Automotive SPICE.Collaborate with the DV team to verify RTL designs.Assist the software team in resolving NoC Interconnect and Memory System-related issues.SKILLS & EXPERIENCEM.S. or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science or relevant subjects.Strong understanding of computer architecture, microarchitecture, and performance optimization.Solid knowledge of automotive standards and requirements (e.g., ISO 26262).10+ years of relevant experience in architecture, RTL design, performance analysis, and power optimization.Proven experience in designing and optimizing interconnects for automotive applications.Expertise in developing fail-operational interconnect architectures for functional safety.Familiarity with the architecture and microarchitecture of recent ARM processors is a plus.Knowledge of AMBA AXI, CHI, and LPDDR45 interfaces and protocols is an advantage.Excellent communication, problem-solving, debugging, and root-cause analysis TERESTEDTo apply for this opening or to find out more about our other opportunities, please contact Georgie Rose on LinkedIn or send an email to
Created: 2024-11-01