Lead DFT Architect
Acceler8 Talent - Hayward, CA
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Acceler8 Talent has partnered with a series D startup company that has created an innovative software-defined architecture providing scalable performance, enabling real-time computing for a range of critical and complex applications.This advanced technology improves power efficiency and reduces latency while significantly enhancing computing capabilities for large datasets, whether processed at the edge or in the cloud. Key applications include accelerating encryption techniques, such as Fully Homomorphic Encryption (FHE), to enable real-time computation on encrypted data, supporting data privacy and security.Founded by a well known name in the industry this company has closed their series C, taped out their first chip and is currently in the process of taping out their second, more complex chip.They are seeking a Lead DFT Architect to not only manage and mentor a team of 6 engineers but also to strategically grow and strengthen the team's capabilities.Job Summary:We are looking for a skilled DFT Architect and Manager to lead the DFT efforts for SoC/ASIC products. The ideal candidate will have a strong background in Design for Testability (DFT) and proven leadership in guiding teams. This role combines technical expertise with team leadership to drive efficient and high-quality designs.Key Responsibilities:Define and implement DFT architecture for complex SoC/ASIC designs.Develop methodologies to ensure high test coverage, low test cost, and quick time-to-market.Lead a team of engineers, providing technical guidance and career development.Implement advanced DFT techniques (scan, MBIST, LBIST, JTAG, ATPG) and ensure smooth integration with RTL.Support post-silicon bring-up, test, and yield improvement.Qualifications:Bachelor's/Master's in Electrical or Computer Engineering.10+ years of experience in DFT, with 3+ years in a leadership role.Expertise in DFT techniques and EDA tools (e.g., Tessent, DFTMAX).Strong leadership, problem-solving, and communication skills.Preferred:Experience in automotive or safety-critical applications.Familiarity with low-power DFT and yield improvement processes.If this excites you and you believe you fit the qualifications above, please apply or reach out to Jwhitcomb@
Created: 2025-01-15