Senior Principal System Validation Engineer
Huntech USA LLC - Santa Clara, CA
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Our customer will build on a highly successful year with wider acceptance from their hyperscaler customers and further growth expected this year. Bring your talents to this market leader.Develop and perform system validation tests using leading-edge Data Center equipment and scalable automation platforms. The validation team holds customers' system requirements in the highest regard and is solely responsible for certifying a product's conformance to this high bar.Understand the performance and functionality requirements their ICs must deliver to enable customers developing Data Center systems using game-changing portfolio of connectivity products for AI and ML applications.Formulate a comprehensive validation plan, automate the testing of ICs and board products in a data-centric manner, design experiments to root-cause unexpected behavior, report results and specification compliance in an automated fashion.Work with key customers directly to understand their care-abouts and highlight the unique capabilities and performance of solutions.Basic qualificationsStrong academic and technical background in Electrical or Computer Engineering. At a minimum, a Bachelor's is required, and a Master's is preferred.=12 years' experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.Basic understanding of x86/ARM architecture, UEFI/Linux boot sequence.Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer/internal meetings in advance, and to work with minimal guidance and supervision.Entrepreneurial, open-mind behavior and can-do attitude. Think and act with the customer in mind!Required experienceHands-on, thorough knowledge of high-speed protocols like CXL, PCIe, NVMe, or Ethernet.Experience with Silicon/System bring-up, validation, and debug experience, including in customer systems.A strong background in developing bench automation techniques, especially using Python, with emphasis on execution efficiency, repeatability, data analysis and reporting.Experience with lab equipment including protocol analyzers, in-circuit debuggers, and CPU-based tool suites.Preferred experienceWorking knowledge of C or C++ for embedded FW and device drivers.Working knowledge of SerDes architecture including Tx/Rx equalization, adaptation, CDR, block level requirements and SerDes link jitter budget. Experience with PAM4 SerDes is a huge bonus!Familiarity with PCIe compliance standards and ability to follow and be involved in compliance consortiums to adapt the tests to be run from X86/ARM based platforms.Knowledge of schematic capture and PCB layout tools from Cadence Allegro, Altium, etc.Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc. for IBIS-AMI analysis.
Created: 2025-01-14